3rd Interview from Synopsys

Technical problems about C/C++ programming and microarchitecture design.

Non-technial questions

Q1-1

Have you had any industrial experience? Or all your projects are course-based?

A1-1

I had one (pointing the Cam Controller one). It is a product of a small company. I took charge of the whole process, from PCB design to programming.

Q1-2

How long did it last?

A1-2

Because it is part-time, not full-time. It lasted for one semester.

Q2

Did you have any experience with verilog?

A2

Yes, I did some projects with verilog. The most complicated one I listed here (pointing the Multi-Cycle Processor on resume). It is a simple microcontroller, supporting 8051 ISA. Not all instructions in the ISA, but enough to run a C program on my design. (I should have mentioned that I am taking a course using Zynq this semester as well).

Q3

Do you programming in C++?

A3

Most of my projects use C. But I know C++. The one I remember is when I taking an algorithm course, I implemented Boyer-Moore algorithm in C++. It is a pattern matching algorithm. And the project I am working on now, the graph processing project, it uses C++.

A4

So which one you are more familar with? C or Verilog?

Q4

I think it should be C, because you know my verilog project is several years ago, when I was a sophomore.

Interviewer: OK, then let me ask some questions about C. (Turned into technical questions)

Q6

What is the project you are proud of most?

A6

(Hesitating… that is pretty bad).

Interviewer: Any thing is OK, even not necessary an engineering project.

The Multi-Cycle Microcontorller project, I mentioned just now, I think. (I should say whatever project I am working on, I would put all my heart on it. So I love any project I participated in.)

Technical questions

Q5-1

In C, how to extract bit 5 through bit 11 from a variable? Write it down on the white board.

A5-1

We can use bitwise operation.

res = (var & 0x0FF0) >> 4;

And if you want the result is on the rightmost, we can do shift.

Q5-2

Where does the FF comes from?

A5-2

It is corresponding to bit 5 through bit 11. (I hadn’t realized my mistake by that time)

Interviewer: Show me that. What is the least significant bit?

You mean write them down like this? (Writing down 0000 1111 1111 0000)

Interviewer: What bit it is? (pointing the rightmost 0) Bit 0. Oh, I realized my mistake. It should be 0x0FE0.

Q5-3

How do you correct your code?

A5-3

How? You mean? Is there any other mistake in my code? Oh, it should shift 5.

res = (var & 0x0FE0) >> 5;

Sorry.

Q5-4

How do you make it a function?

A5-4

An inline function or?

Interviewer: Any function as you like.

Or can I just use it as a macro?

#define f(x) (x & 0x0FE0)>>5

It has an input x. And later we can use it as a function like:

f(var);

Q6-1

In C++, what is multiple inheritance?

A6-1

Multiple inheritance, I think, it means a class can inherit multiple features from more than two other classes?

Q6-2

Have you ever solved the diamond problem in C++.

A6-2

No…

Q6-3

Have you ever taken a C++ course or learnt it by yourself?

A6-3

No C++ course. I learnt it by myself by reading the book called C++ Premier.

Q6-4

Have you ever learnt Python? (Obviously he found I know too less about C++, so he is trying to find another supplement language…)

A6-4

Yes, I learnt python last semester, a course. We do labs with python in that course, like a backend of a website.

Q7-1

Have you ever take a computer architecture course?

A7-1

Sure, last semester.

Interviewer: Let’s see how good your memory is.

Q7-2

What is Moore’s Law?

A7-2

It is about Integrated Circuit. For every 18 monthes, the number of transistors on an integrated circuit doubles, and the cost halves.

Interviewer: No the actual price doesn’t halve.

I mean, there are two versions of expressions.

Q7-3

In pipeline, there are hazards happen. Tell me two kinds of hazard.

A7-3

Structual hazard, data hazard and … control hazard.

Q7-4

What is control hazard?

A7-4

In program there are branch instructions, to change the flow of program…

Interviewer: OK.

Q7-5

How to reduce the influence of control harzard?

A7-5

There are several ways.

We can try to move the branch decision as front as possible. I mean, for example in MIPS pipeline, there used to be five stages, and whether the branch is taken or non-taken is decided in the execute stage, later they moved the branch to decode stage. This saves one cycle. (The point I tried to express is the earlier we know whether the branch taken or not, the less cycles we have to stall.)

Another way, I think is commonly used in modern processors is branch predictor.

Interviewer: OK, tell me one branch predictor you know.

… (I thought for too long time, many predictors came to my mind, but I am not sure about their name) History predictor? Use one bit to record whether the branch instruction is taken or non-taken, and next time when we run to this branch instruction, by looking at PC we are able to know it is the same branch instruction, we can make prediction according to last time’s record then do supeculation execution. (My description actually is 1-bit saturating counter, while tremendous experiences have revealed 2-bit saturating counter, a.k.a bimodal predictor, is the most effective one-level branch predictor)

Q7-6

Why there is data hazard?

A7-6

If an instruction needs to use the result of its previous instructions, it needs to wait until get their result.

Q7-7

OK, data dependency, RAW (Read After Write). How to reduce the influence of data harzard? (Maybe he is asking what to do to avoid wrong result caused by data hazard, then I should say add logic to detect data dependency).

A7-7

There are several ways.

Change the order of instructions for example.

Interviewer: Change order, how?

For example if there is an instruction 1, and instruction 2. Instruction 2 needs the result of instruction 1. We might find other instructions following instruction 2 that has no data hazard, and move it before instruction 2.

Interviewer: So you mean let compiler to change the order.

Yes. It is a compiler optimization.

And another way, we can do forwarding.

Q7-8

What is cache?

A7-8

Cache? Cache is a small memory to make up the difference of speed between CPU and main memory.

Q7-9

What characteristic does cache have?

A7-9

Usually cache has small capacity, but they are faster.

Interviewer: I mean why cache works?

Oh, you are asking what cache takes advantages of?

Interviewer: Yes.

Cache takes advantages of locality. There are two kinds of locality, one is Temporal Locality, another is … (I forgot the name of Spatial Locality, but made a gesture to let interviewer understand)

Q7-10

What is cache coherency?

A7-10

To read the value of same address, two processes, should get the same result, at same time.

Q7-11

What to do to guarantee the coherency?

A7-11

Snooping? The problem of coherency is for multiple processes, they cache their own data, privately. So one can snoop the bus, when another write a change to the location, this one changes as well. (Actually, cache protocal should come first, which determines the general strategy. Snooping is just the technique to implement the cache protocal)

Q7-12

What is superscalar?

A7-12

If a processor only issue one instruction at a time, it is a scalar. If it can issue more than two instructions (I should say more than 1, but the interviewer seems not notice anyway didn’t correct me), it is a superscalar.

Q7-13

What is virtual memory?

A7-13

Because there might be more than two processes run on the processor, so with the help of operating system, we can use virtual memory to seperate their data… (I totally lost my expression here, and the interviewer struggled hard to understand me).

Interviewer: What is the main purpose to do virtual memory? Main advantage.

Oh, another advantage of virtual memory is it seperate the software and hardware. Whatever how the physical memory looks like, the programmer does not need to know.

Interviewer: No.

The motivation to use virtual memory in history is that the physical memory used to be limited, but virtual memory could give an illusion to program that there is enough memory to play with.

Q7-14

What is the tool virtual memory uses?

A7-14

I know there is an component in processor called TLB (Translation Lookup Buffer).

Interviewer: What?

TLB, Translation …

Interviewer: We use compiler as a tool to translate source files into binary. That’s just an example. What tool we use for virtual memory?

Hard-wired logic? (I was thinking the actual computation would be done by adder…)

Interviewer: No.

Oh, page table?

Interviewer: No, that’s the implementation.

Interviewer: It is operating system. Operating system do the translation.

… I know operating system manages the virtual memory space. But operating system is too different from compiler to think it as a tool… (My useless argument)

Interviewer: That’s all my technical questions.

My question:

I asked about the number of applicants and how they performed. Only the former got answered.